1. Field of the Invention
This invention relates to a semiconductor integrated circuit and an operational amplifier, specifically to a semiconductor integrated circuit and an operational amplifier that can be set into a stand-by mode.
2. Description of the Related Art
Bias instability is one of factors to cause deterioration in characteristics of an MOS transistor. It is a change in the transistor characteristics (mainly a threshold voltage Vt) over time due to trapping of charges into defects in a gate oxide film, when strong electric field is generated in the gate oxide film of the MOS transistor and maintained for a long period or the gate oxide film is placed in a strong electric field by dynamic operation.
There are two modes of bias instability, i.e. NBTI (Negative Bias Temperature Instability) mode and PBTI (Positive Bias Temperature Instability) mode, according to a direction of the electric field in the gate oxide. The direction of the gate electric field is from a back gate toward the gate in the NBTI mode, while the direction of the gate electric field is from the gate toward the back gate in the PBTI mode on the contrary.
Correlation between the instability of the MOS transistor and deterioration of circuit characteristics is explained hereinafter using an example of a concrete circuit. FIG. 3 is a circuit diagram showing an operational amplifier circuit of a prior art. The operational amplifier circuit is provided with a pair of N-channel type MOS transistors M1 and M2 that constitutes a current mirror and a pair of P-channel type differential MOS transistors M3 and M4. Each of a pair of differential input signals VINN and VINP is applied to each gate of the differential MOS transistors M3 an M4, respectively. A P-channel type MOS transistor M5 for biasing, to a gate of which a bias potential VBias is applied, is inserted between the pair of P-channel type differential MOS transistors M3 and M4 and a power supply potential VDD. A back gate bias effect is prevented to set a wide input dynamic range for the operational amplifier circuit by connecting back gates B with sources S of the pair of differential MOS transistors M3 and M4.
M6 and M7 are output MOS transistors. M6 is P-channel type while M7 is N-channel type. An electric potential at a connecting node between the differential MOS transistor M4 and the MOS transistor M2 is supplied to a gate of the output MOS transistor M7. And an N-channel type MOS transistor M8 that is controlled by a stand-by signal STB is connected to the gate of the output transistor M7 so that the MOS transistor M8 is turned on to forcibly set the gate of the output MOS transistor M7 at a ground potential VSS to turn off the output MOS transistor M7 when the stand-by signal STB is turned to “high” in a stand-by mode.
And the bias potential VBias is applied to a gate of the output MOS transistor M6. An N-channel type MOS transistor M9 that is controlled by a reverse stand-by signal STBB is connected to a line providing the gate of the output transistor M6 with the bias potential VBias so that the MOS transistor M9 is turned on to forcibly set the gate of the output MOS transistor M6 at the power supply potential VDD to turn off the output MOS transistor M6 when the reverse stand-by signal STBB is turned to “low” in the stand-by mode. That is, the bias potential VBias is set at an intermediate potential between the power supply potential VDD and the ground potential VSS in normal operation, and is forcibly set at the power supply potential VDD in the stand-by mode by turning-on of the MOS transistor M9.
Therefore, according to this operational amplifier circuit, power consumption of the circuit is reduced by turning-off of the MOS transistor M5 for biasing and the output MOS transistors M6 and M7 in the stand-by mode.
As for the MOS transistor M5 for biasing and the output MOS transistors M6 and M7, the gate electric field in each of them is weak in the stand-by mode, causing no problem due to the bias instability. As for the pair of differential MOS transistors M3 and M4, however, their back gates B are left floating with their back gate potential VB being uncertain, since the MOS transistor M5 for biasing is turned off. Thus, depending on the differential input signals VINN and VINP, their gate electric field becomes strong to cause the two modes of bias instability, i.e. NBTI mode and PBTI mode described above. Further details are found in Japanese Patent Publication No. H10-075133.
Since the back gates B of the pair of differential MOS transistors M3 and M4 are left floating in the stand-by mode in the operational amplifier circuit of FIG. 3, there arise the two modes of bias instability, i.e. NBTI mode and PBTI mode, as described above, causing deterioration in characteristics of the transistors, especially a big change in threshold voltages over time, leading to an offset voltage between the differential MOS transistors in normal operation in some cases.
Which bias instability mode, i.e. NBTI mode or PBTI mode, causes more deterioration in the transistor characteristics depends strongly on manufacturing processes. An experiment conducted by the inventors has proved that a change over time caused in a threshold voltage Vt of a P-channel type MOS transistor prototyped by a certain manufacturing process is larger in the PBTI mode than in the NBTI mode.
In the operational amplifier circuit described above, when the differential input signal VINN to the differential MOS transistor M3 is set at the power supply potential VDD, for example, as shown in FIG. 4, VINN becomes larger than VB since the back gate potential VB is considered to be in a range VSS<VB<VDD and uncertain in the stand-by mode, thus leading to the PBTI mode and causing the change in the threshold voltage Vt over time.